Espoo, Finland, Munich, Germany, 23 June 2026 – IQM Quantum Computers, the global leader in superconducting quantum computers, today announced a significant achievement in quantum error correction, using directional tile codes, marking a major step toward practical, large-scale fault-tolerant quantum computing.

The research, available on arXiv, and co-authored by IQM researchers and collaborators at Freie Universität Berlin, the University of Edinburgh, and Johannes Gutenberg-Universität Mainz, introduces ‘directional tile codes’, a new family of quantum error-correcting codes that resolves one of the central tensions in quantum computing.

As IQM prepares for its planned Nasdaq listing through a merger with Real Asset Acquisition Corp. (Nasdaq: RAAQ), this research advances a core pillar of its technology roadmap targeting, fault-tolerant quantum computing by 2030 and a path to scaling up to one million qubits.

The results show that, using only the nearest-neighbour iSWAP gates already native to IQM’s Crystal processors, directional tile codes can reduce the per-logical per-round error rate by up to 1,000 times compared to the widely used surface code at a comparable hardware footprint of around 30 physical qubits per logical qubit.

“Quantum error-correction codes should not only be highly efficient; they should also be implementable on scalable and manufacturable hardware architectures. A close co-design of quantum error correction and hardware is a central element of IQM’s strategy. Directional tile codes represent a breakthrough in this direction, delivering up to a 1,000-fold reduction in logical error rates on near-term-sized IQM Crystal hardware while relying only on practical nearest-neighbour connectivity. This is a significant step toward scalable fault-tolerant quantum computing,” said Dr. Inés de Vega, Chief Scientist of IQM Quantum Computers.

“At IQM, we have always believed that building production-grade quantum systems and advancing the underlying science are two sides of the same mission. Close collaboration with leading academic groups is central to that approach, and this result demonstrates what such partnerships can achieve.”

Directional tile codes represent a concrete and measurable step along the path to fault tolerance, demonstrating that the efficiency advantages of Quantum Low-Density Parity Check (QLDPC) codes can be achieved on the planar hardware architecture IQM builds today.

“We have been working on tile codes since 2025, as they are promising candidates due to their local checks, great parameters, and the many ways that exist to perform logical computation with them without adding connectivity requirements. The key innovation of directional tile codes is that we are using dynamic syndrome extraction circuits to implement them on a square grid,” said Dr. Vincent Steffan, Senior Quantum Error-Correction Engineer at IQM Quantum Computers.

The ability to achieve these improvements on square qubit grid makes directional tile codes directly relevant to IQM’s near-term QEC capabilities, while also creating a baseline for further improvements through the continued co-design of error-correcting codes and hardware architectures.

Quantum error correction is widely regarded as a key requirement for achieving quantum advantage on large-scale, practically relevant problems, and it sits at the core of IQM’s technology roadmap. Quantum systems are inherently sensitive to noise and errors, which must be detected and corrected repeatedly throughout a computation to enable reliable and increasingly complex quantum workloads.

To date, IQM has sold 23 quantum systems globally, more than any other quantum manufacturer to customers spanning research institutions, high-performance computing centres, and enterprises.