Quantum error correction (QEC) is one of the central challenges in the development of fault-tolerant quantum computing. Practical QEC is a deeply interdisciplinary topic, drawing on information theory, hardware design, physics, and computer science, While the field has made substantial theoretical and experimental progress, many questions remain open, from the choice and implementation of error-correcting codes to decoding, hardware-software integration, and how QEC techniques perform on real quantum systems. To turn the deep theoretical literature surrounding these questions into practical implementations, students, researchers, and practitioners in QEC-adjacent topics need a chance to approach QEC at an introductory level, demystify the core concepts, and implement QEC on real quantum computers. This was the goal of a recent two-day virtual quantum error correction workshop organized by the National Energy Research Scientific Computing Center (NERSC), with hands-on access to IQM Resonance.
Hosted by Ermal Rrapaj and led by Danny Bulmash, the workshop was designed to move participants from QEC fundamentals to running a quantum memory experiment on real superconducting quantum hardware.
The first day began with a high-level introduction to the promise and challenges of quantum error correction before moving into the mechanics of error-correcting codes and decoding.
Rather than treating QEC solely as a theoretical subject, the training connected the underlying concepts to how error correction can actually be implemented on a quantum computer.
Participants explored why QEC is necessary when running complex quantum algorithms and the amount of noise that has to be addressed. With that motivation, they started with error correction as it is used in classical computers. Some of the key concepts such as logical qubits, encoding, decoding, and thresholds were motivated in the more intuitive classical context. But QEC is not simply a quantum version of classical error correction – some simple thought experiments showed that QEC is much trickier and more delicate than classical error correction. The workshop also discussed why QEC will eventually have to take place during the execution of the circuit, namely that such “real-time” decoding is necessary to implement certain quantum operations without allowing errors to accumulate.
The participants then started looking at real implementations of QEC codes. They constructed quantum circuits that measure “syndromes,” which are used in QEC to detect and locate errors. They applied their knowledge to implement a simple quantum code, namely the [[4,2,2]] code. The discussion then turned to decoding, where they considered some key technical challenges for decoders and surveyed classical algorithms which are used in decoding. The day concluded with an overview of hardware architectures which might be used to implement QEC in a real machine.
One theme that emerged from the training was how much opportunity for innovation remains across the QEC stack. There are promising approaches at multiple layers, but many important architectural and implementation questions remain open.
That makes the interaction between hardware and software particularly important. Progress in QEC will depend not only on better codes or better physical qubits independently, but also on understanding how control, compilation, error characterization, decoding, and hardware architecture work together.
On the second day, the workshop moved toward one of the most prominent approaches to quantum error correction: the surface code.
Participants started with some basic background to the surface code—How are the qubits laid out? What do the measurement of syndromes tell us? What is the encoding? Why is the surface code so frequently used? They then discussed what a quantum memory experiment is, starting from a high-level overview and diving into some of the details of implementation. With this background, the workshop could then move from instruction into hands-on experimentation; participants got a chance to implement the surface code and run a quantum memory experiment themselves using IQM Resonance.
This experiment showed how to actually encode a logical qubit, watch it for errors, and then decode those errors to retrieve the information stored in the logical qubit. Participants saw the effect of noise first-hand, and computed the logical error rate (which measures how quickly that stored information is lost) themselves.
That transition from theory to experiment was an important part of the workshop. Quantum error correction is often discussed in the context of future fault-tolerant machines, but many of its fundamental ideas can already be investigated experimentally on today’s quantum hardware.
For researchers learning QEC, there is an important difference between understanding an error-correcting code conceptually and seeing how an experiment is mapped onto physical hardware.
Hands-on access exposes the practical considerations that can be difficult to appreciate from theory alone: how circuits are constructed, how hardware characteristics affect an experiment, how measurements are interpreted, and where abstractions meet the behavior of a physical quantum system.
This is an important role for platforms such as IQM Resonance. Giving researchers remote access to quantum hardware allows training to progress beyond lectures and simulation toward experiments on actual quantum processors.
IQM Resonance is a particularly valuable platform for this type of experimentation. Researchers can compare the IQM Crystal and IQM Star architectures to explore how different codes perform on different architectures. The open stack makes it possible to build reasonable noise models and do deep analysis on the performance of codes. With pulse-level access, researchers can also work on optimizing QEC protocols at a very deep level of the stack.
Remote access here serves a specific purpose: giving researchers direct experience with quantum hardware today. That experience helps build the technical expertise needed to evaluate how quantum systems can eventually be integrated into institutional computing environments.
The workshop also reflects a broader development in scientific computing. Quantum computing is increasingly being explored alongside HPC rather than as an isolated computing paradigm.
NERSC occupies an important position in that environment, serving a large scientific computing community and helping researchers evaluate emerging computing approaches.
For Ermal Rrapaj, Ph.D., a member of NERSC’s Advanced Technologies Group, that makes practical exposure to quantum error correction increasingly relevant to the scientific community:
“As the community approaches the early fault tolerant era of quantum computing, error correction becomes an important topic not only for providers but also for domain scientists that want to leverage hardware capabilities in the near future term.
NERSC users span a wide array of scientific disciplines which can take advantage of this technology, and practical introductions to error correction are particularly useful in connecting their applications to quantum hardware.”
Large-scale fault-tolerant quantum computers will require significant advances in hardware, software, error correction, and their integration. But researchers do not have to wait for those systems to begin developing the knowledge and experimental skills that will be needed to use them.
Workshops like this provide an opportunity to learn the theory, work through the implementation, and then test those ideas on real hardware.
That progression is important. Developing the future quantum workforce and research community requires more than explaining what quantum computers may eventually be able to do. It requires giving people opportunities to experiment with the technology that exists today.
For QEC in particular, there is still considerable room to explore, test ideas, and improve every layer of the stack.
And that makes now a particularly interesting time to get hands-on.
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